Department of Electrical and Electronics Engineering

PROCEDURE FOR REGISTERING SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT DESIGN IN INDIA

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25 Oct 2025

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5:15 PM - 7:15 PM

Department of Electrical and Electronics Engineering Organises Guest Lecture on PROCEDURE FOR REGISTERING SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT DESIGN IN INDIA Mrs.N.Kumutha Project Scientist - II, TNSCST, Chennai, Tamilnadu, India PROCEDURE FOR REGISTERING SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT DESIGN IN INDIA

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